DFM was presented on the 18th May for the first time at the 13th IEEE International Memory Workshop (IMW), by its inventors, Drs. Koji Sakui and Nozomu Harada from Unisantis, in a paper entitled “Dynamic Flash Memory with Dual Gate Surrounding Gate Transistor (SGT)”.
DRAM is a volatile, capacitor-based, destructive-read form of memory – and its challenge has long been to continue packing in more storage for lower cost, without increasing power consumption. DFM takes a revolutionary approach to overcome limitations of conventional volatile memory such as DRAM, with its inherent short, regular and power-hungry refresh cycles, as well as destructive read processes.
DFM is also a type of volatile memory, but since it does not rely on capacitors it has fewer leak paths, it has no connection between switching transistors and a capacitor. The result is a cell design with the potential for significant increases in transistor density and, because it not only offers block refresh, but as a Flash memory it offers block erase -- DFM reduces the frequency and the overhead of the refresh cycle and is capable of delivering significant improvements in speed and power compared to DRAM.
By utilizing TCAD simulation, Unisantis has proven DFM has a substantial potential to increase density 4X compared to DRAM. The scaling of DRAM has almost stopped at 16Gb, according to recent IEEE ISSCC (International Solid-State Circuits Conference) papers. Modelling DFM at 4F2 cell density shows how perfectly structured DFM is. The design and development of DFM means significant Gb/mm2 improvements, and today’s limits on DRAM (currently 16Gb) could immediately see increases to 64Gb memory using DFM’s radically enhanced cell structure.
Replacing DRAM is a major challenge for the industry, not only because DRAM today accounts for over 50% of the current market demand for memory (Yole Development, 2020). Forecasts suggest this type of low cost, high density DRAM by 2025 will continue to grow and exceed $100Bn. But challenges also lie ahead presented by some of the proposed replacements, including capacitor-less DRAM, ZRAM or simplistic GAA and Nanosheet approaches, all which have their own limitations compared to DFM.
Koji Sakui, Unisantis and co-inventor of DFM, commented “The memory industry has long-since accepted DRAM technology is nearing the end of its life, but its significant market means any replacement technologies must provide the right balance of performance, costs and future scalability. After significant internal research and testing, we are delighted to unveil DFM to the market as the leading long-term viable option to DRAM.”
“We are delighted to present Dynamic Flash Memory with its significant advantages over the current DRAM architecture”, added James Ashforth-Pook, Senior Vice-President of Unisantis Electronics.
Following today’s unveiling, the company is now seeking to further its own technical development, and in parallel, to testing and demonstrating the features and fuller potential of DFM externally with a series of memory and foundry partnerships.
Further details on DFM and the application of Unisantis SGT Technology will be shared at future events.
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For further information on Unisantis, visit: www.unisantis.com